In the past, many various different types of methods were developed for fabricating semiconductor devices wherein openings were formed in one or more dielectric layers or coatings deposited on or above a surface of these semiconductor devices in order to permit the subsequent formation of metal contacts to be made to different P or N doped regions of these semiconductor devices. The formation of metal contacts to the various semiconductor regions of semiconductor devices was generally considered to be a fairly standard process wherein photolithographic masking and etching techniques were used to open up holes in one or more dielectric layers or coatings on or above the surface of the semiconductor devices in order to permit the subsequent formation of metal contacts to the underlying exposed semiconductor regions of these semiconductor devices. These metal contacts to the various semiconductor regions of the semiconductor devices had to be extremely reliable because any failure in the formation and performance or operation of any one of the metal contacts would usually result in the destruction or failure of the semiconductor device associated therewith. Usually, these metal contacts to the various semiconductor regions of the semiconductor devices were electrically connected to conductive stripes or conductive lands running along a surface of a dielectric layer or coating located on or above the surface of the underlying semiconductor regions of the associated semiconductor device.
Thus, one great fear in the fabrication of semiconductor devices is the concern that a cracked metal conductor land, metal stripe or associated metal contact will be created thereby forming an electrical "open" condition which resulted in the destruction of the entire semiconductor device.
Accordingly, it became very critical to insure that the semiconductor process or method steps or operations to fabricate the semiconductor devices would not produce a situation where conductive metal lands, stripes, or the metal contacts connected to the metal conductor stripes or lands would not be subjected to cracking or exposure to cracking. For example, semiconductor process engineers have focused on avoiding situations where these metal electrodes or contacts or their associated electrically conductive lands or stripes would have a likelihood or tendency to crack during the process of forming these contacts or electrodes or their associated electrically conductive lands or stripes.
In the fabrication of many types of semiconductor devices, the metal contacts or electrodes or electrically conductive stripes or lands connected or associated therewith or coupled thereto were generally deposited in contact with a portion of the top surface of an underlying dielectric or insulating coating or layer. Consequently, if the underlying dielectric or insulating layer had sharp edges, then the deposited and formed metal contacts or electrodes and the electrically conductive lands or stripes would have to be deposited on and over these sharp edges of the dielectric or insulating layer which was not good from a semiconductor processing viewpoint due to the greater likelihood or increased probability that there would be cracking (formation of an "open") at the junction of the sharp edges of the insulating layer.
Accordingly, there was a need to provide a process or method for smoothing out sharp edges on a dielectric or insulating layer to be located beneath a deposited metal layer that would be used to form metal electrodes and/or electrically conductive lands or stripes for providing electrical connection to various regions of the semiconductor device.